About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Paper
Low-voltage transient bipolar effect induced by dynamic floating-body charging in scaled PD/SOI MOSFET's
Abstract
An increased significance of the parasitic bipolar transistor (BJT) in scaled floating-body partially depleted SOI MOSFET's under transient conditions is described. The transient parasitic BJT effect is analyzed using both simulations and highspeed pulse measurements of pass transistors in a sub-0.25 μm SOI technology. The transient BJT current can be significant even at low drain-source voltages, well below the device breakdown voltage, and does not scale with technology. Our analysis shows that it can be problematic in digital circuit operation, possibly causing write disturbs in SRAM's and decreased retention times for DRAM's Proper device/circuit design, suggested by our analysis, can however control the problems.