Low-power CMOS integrated circuit for field-powered radio frequency identification tags

Abstract

A high-level diagram of the radio frequency identification (RFID) tag integrated circuit is presented. The chip consists of four main blocks: an RF front end; an analog section; a digital section; and an EEPROM section. The front end is responsible for power recovery, demodulation of the incoming RF signal, and the backscatter transmission of returned data. The remaining sections handle power management, biasing, data recovery, operating protocols, and user-available data storage. The chip was implemented in a 1 μm CMOS process with an added EEPROM module and integrated Schottky diodes.