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Publication
MEMOCODE 2010
Conference paper
FPGA-based combined architecture for stream categorization and intrusion detection
Abstract
This paper presents a working solution for the MEMOCODE 2010 design contest. The design presented in this paper is implemented in the Xilinx V5LX330 FPGA as a custom circuit. The solution implements pattern matching logic for all the mandatory and optional patterns while maintaining the required line rate of 500 Mbps. © 2010 IEEE.