PaperWhen are transmission-line effects important for on-chip interconnections?Alina Deutsch, Gerard V. Kopcsay, et al.IEEE T-MTT
Paper1-GHz fully pipelined 3.7-ns address access time 8 k × 1024 embedded synchronous DRAM macroOsamu Takahashi, Sang H. Dhong, et al.IEEE Journal of Solid-State Circuits
Conference paperA fully-integrated switched-capacitor 2:1 Voltage converter with regulation capability and 90% efficiency at 2.3A/mm2Leland Chang, Robert K. Montoye, et al.VLSI Circuits 2010
PaperSubmicrometer-Channel CMOS for Low-Temperature OperationJack Yuan-Chen Sun, Yuan Taur, et al.IEEE T-ED
