Enhanced multi-threshold (MTCMOS) circuits using variable well bias

Abstract

Advanced CMOS technology can enable high levels of performance with reduced active power at the expense of increased standby leakage. MTCMOS has previously been described as a method of reducing leakage in standby modes, by addition of a power supply interrupt switch. Enhancements using variable well bias and layout techniques are described and demonstrate increased performance and reduced leakage over conventional MTCMOS circuits.