High speed serializing/de-serializing design-for-test method for evaluating a 1 GHz microprocessor

Abstract

As microprocessor speeds approach 1 GHz and beyond, the difficulties of at-speed testing continue to increase. In particular, automated test equipment which operates at these frequencies is very limited. This paper discusses a design-for-test method which serializes parallel circuit inputs and de-serializes circuit outputs to achieve 1 GHz operation on test equipment operating at frequencies below 100 MHz. This method has been used to successfully characterize the operation of a 1 GHz microprocessor chip.