B.A. Hutchins, T.N. Rhodin, et al.
Surface Science
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
B.A. Hutchins, T.N. Rhodin, et al.
Surface Science
J.Z. Sun
Journal of Applied Physics
L.K. Wang, A. Acovic, et al.
MRS Spring Meeting 1993
R. Ghez, J.S. Lew
Journal of Crystal Growth