Diffusion induced line edge roughness

Abstract

As feature dimensions shrink, line edge roughness has become an increasing concern in semiconductor fabrication. There are numerous potential contributors to line edge roughness throughout the lithographic process and any measured roughness value on a printed device feature is, like the feature itself, a convolved function of every processing step. When the full lithographic process is used to study line edge roughness, it can be difficult to isolate the contribution to final roughness from any individual processing step or factor. To gain a more fundamental understanding of roughness generation that is specifically related to photoresist chemistry and formulation it is necessary to design experiments that separate out exposure related issues like mask dimension variation or local dose variation ("shot noise"). This can be accomplished using previously reported experimental protocols for bilayer film stack creation. The bilayer experimental approach has been used to study the effect of variations in such factors as post exposure bake time, photoacid generator loading, and developer concentration on roughness generation. Surface roughness of the developed film stacks is measured via atomic force microscopy. Surface roughness of developed bilayer film stacks may be considered analogous to sidewall roughness of printed features. An acrylate-based 193nm photoresist resin and an APEX-type resin are used in these experiments. In addition to experimental results, results from mesoscale lithographic simulations are used to gain further insight into diffusion induced roughness and how roughness in the latent image is modified during the development step.