Detail vs. simplifying assumptions for simulating semiconductor manufacturing lines

Abstract

Simulating semiconductor manufacturing lines are necessary in order to understand how various factors interact to affect the performance of these complex lines. The author reports on the effects of the commonly made assumptions of no rework, representing rework by increasing process times, no operator constraints, and no machine failures. The author uses a detailed, flexible model in which the assumptions may or may not be made. The base case, validated for a real line, makes none of the simplifying assumptions listed and is compared with subsequent runs making each assumption in turn. Generally, performance is degraded. In some cases the performance measures (resources utilization, work-in-process, and cycle times) remain within 20% of the base case.