Publication
ECS Meeting 2014
Conference paper

Challenges in contact technologies for planar/non-planar Si technologies

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Abstract

This article explores challenges to fabricating contacts to CMOS devices as the industry transitions from planar to non-planar device geometries. Traditional challenges such as contacted gate pitch scaling, parasitic capacitance & resistance as well as newer challenges due to an increase in process & integration complexity are reviewed and highlighted.

Date

Publication

ECS Meeting 2014

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