Cache Sampling by Sets

Abstract

Caches have been widely utilized as fast memory buffers in high performance computers. Due to the advance of VLSI technology caches are becoming critical components for modern microprocessors running at high clock rates. It is important to understand the behavior of a cache organization before design target is decided. However, studying cache performance often requires simulation or emulation of large amount of memory references across broad applications. Such tasks can be rather time-consuming and expensive. One approach to reducing such complexity is through sampling methods. In this paper we examine techniques for workload sampling of set-associative caches. The new approach of sampling by selected sets fits well with the cache structures. Empirical results are presented to demonstrate the validity of the proposed heuristics. We also discuss potential system instrumentations in which sampling techniques may be utilized. © 1993 IEEE