A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
The high-speed cache memory acts as a buffer between main memory and the central processing unit (CPU). Cache design, a direct-mapped cache and a fully associative cache and its implementation can make or break the performance (cache size, associativity, line size, physical versus virtual, and degree of asynchrony) of a computer systems. Accordingly, a higher level of associativity is better with respect to caches and physically addressed caches are better for environments where context switching is very frequent. In designing or tuning a CPU intensive application, it is advisable to maximize locality and avoid memory-access sequences that increase by large powers of 2.
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
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IBM J. Res. Dev
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