Christophe R. Tretz, C.T. Chuang, et al.
International Journal of Electronics
The design and performance characteristics of a 128X64 MOS transistor memory is given. The storage cell used operates with a low standby power, 0.1 mW. The memory operates with a 12-ns access time, 35-ns read cycle time, and a 60-ns write cycle time. Copyright © 1966 by The Institute of Electrical and Electronics Engineers, Inc.
Christophe R. Tretz, C.T. Chuang, et al.
International Journal of Electronics
Y.S. Yee, L.G. Heller, et al.
ESSCIRC 1977
N.C.-C. Lu, P.E. Cottrell, et al.
IEDM 1984
P. Pleshko, T.J. Thomas
IEEE Transactions on Magnetics