Wire segmenting for improved buffer insertion
Charles J. Alpert, A. Devgan
DAC 1997
Accuracy of a transient simulator is critically dependent on its device models, and device model evaluation is often a bottleneck in transient simulation performance. This paper presents comprehensive modeling techniques to compute Fast-to-evaluate and Accurate Simplified Transistor (FAST) models for aggressive MOS technologies. These FAST models accurately capture the static and dynamic behavior of the transistor, and lend themselves to efficient transient simulation. Use of FAST models in timing simulator ACES leads to speedups of 1000x or more over traditional circuit simulators with little or no loss in circuit timing accuracy.
Charles J. Alpert, A. Devgan
DAC 1997
Charles J. Alpert, A. Devgan, et al.
ICCAD 1999
Tuyen V. Nguyen, A. Devgan
ICCAD 1997
Charles J. Alpert, A. Devgan, et al.
ISPD 2000