Shu-Jen Han, Alberto Valdes Garcia, et al.
IEDM 2013
The variability of CMOS device propagation delay is measured with a special test circuit. The circuit detects AC delay variations, as distinct from the DC effect of threshold voltage variation. The AC variability is likely due to the vertical resistance of the gate-stack. A comparison of two technologies, using gate-first and gate-last gate-stacks, shows much reduced variability of the gate-last FETs. This is attributed to the absence of interfacial dopant fluctuation and the presence of tailored metallic interfaces in gate-last technologies.
Shu-Jen Han, Alberto Valdes Garcia, et al.
IEDM 2013
Yu-Ming Lin, Damon B. Farmer, et al.
IEEE Electron Device Letters
Bruce Fleischer, Christos Vezyrtzis, et al.
ICCD 2016
Keith A. Jenkins, Herschel Ainspan
SiRF 2006