Jianshi Tang, Qing Cao, et al.
Nature Electronics
The variability of CMOS device propagation delay is measured with a special test circuit. The circuit detects AC delay variations, as distinct from the DC effect of threshold voltage variation. The AC variability is likely due to the vertical resistance of the gate-stack. A comparison of two technologies, using gate-first and gate-last gate-stacks, shows much reduced variability of the gate-last FETs. This is attributed to the absence of interfacial dopant fluctuation and the presence of tailored metallic interfaces in gate-last technologies.
Jianshi Tang, Qing Cao, et al.
Nature Electronics
Pouya Hashemi, Takashi Ando, et al.
VLSI Circuits 2015
Keith A. Jenkins, Eduard Cartier, et al.
IEEE Electron Device Letters
Alberto Valdes-Garcia, Fengnian Xia, et al.
IMS 2013