Moriyoshi Ohara, Hangu Yeo, et al.
ISBI 2007
In this paper, a high-throughput modular architecture for a logarithmic search block-matching algorithm is presented. The design efforts are focused on exploiting the search area data dependencies using special data input ordering constraints. The input bandwidth problem has been solved by a random access on-chip memory, and a simple address generation procedure has been described. Furthermore, this architecture can handle a large search range with unequal horizontal and vertical spans using a technique called pipeline interleaving. Compared to the existing architectures for the three-step search BMA, this architecture delivers a high throughput rate with fewer input lines, and is linearly scalable. © 1998 IEEE.
Moriyoshi Ohara, Hangu Yeo, et al.
ISBI 2007
Hangu Yeo, Krishna Ratakonda, et al.
ICIP 2002
Octavian Popescu, Irene Manotas, et al.
COLING 2022
Hangu Yeo, Vadim Sheinin, et al.
SPIE Medical Imaging 2009