A compact, timed-shutoff, MOSFET-based power clamp for on-chip ESD protection

Abstract

We present a novel RC-triggered, MOSFET-based power clamp for on-chip ESD protection. The cascaded PFET feedback technique is introduced. As with other feedback techniques, only a very small time constant is required for the RC trigger circuit which results in reduced capacitor area and reduced leakage at power-up. If mistriggering occurs, it is self-corrected with this dynamic feedback technique.