0.5 μm CMOS devices and circuits fabricated using synchrotron X-ray lithography

Abstract

Synchrotron radiation source X-ray lithography is used to fabricate 0.5 μm CMOS devices and circuits at all lithography levels. The exposures are done in a step-and-repeat exposure system with the masks made of patterned gold absorber on thin silicon membranes. Chip size up to (25 mm)2 can be accommodated for each exposure field. The wafers are exposed at an X-ray beam line from the National Synchrotron Light Source of Brookhaven National Laboratory. From the measured device characteristics, oxide charges, surface states and bulk traps from the X-ray radiation are generated. Experimental results indicate that the oxide charges and surface states can be eliminated through hydrogen post-metalization annealing; however, the device long-term stability is slightly reduced in comparison with devices fabricated using optical lithography, due to residual radiation damage.