Publications

6 results at ISQED 2007

Cross layer error exploitation for aggressive voltage scaling
- - Amin Khajeh Djahromi
  - Ahmed M. Eltawil
  - et al.
- 2007
- ISQED 2007
OPCFriendly bus driven floorplanning
- - Hua Xiang
  - Liang Deng
  - et al.
- 2007
- ISQED 2007
Multi-dimensional circuit and micro-architecture level optimization
- - Qi Zhenyu
  - Matthew Ziegler
  - et al.
- 2007
- ISQED 2007
Enablement of variation-aware timing: Treatment of parasitic resistance and capacitance
- - Ning Lu
  - Judy H. McCullen
- 2007
- ISQED 2007
Gate leakage effects on yield and design considerations of PD/SOI SRAM designs
- - Rouwaida Kanj
  - Rajiv Joshi
  - et al.
- 2007
- ISQED 2007
Device footprint scaling for ultra thin body fully depleted SOI
- - Jie Deng
  - Keunwoo Kim
  - et al.
- 2007
- ISQED 2007