SRAM-Based Analog Compute-In-Memory Architecture Using C-2C Ladder And Signal Margin Assisted Design Methodology
- Dinesh Kushwaha
- Ashish Joshi
- et al.
- 2024
- ISQED 2024
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4 results for Ashish Joshi
An Energy-Efficient Multi-bit Current-based Analog Compute-In-Memory Architecture and design Methodology
- Dinesh Kushwaha
- Ashish Joshi
- et al.
- 2023
- VLSID 2023
A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing
- Dinesh Kushwaha
- Aditya Sharma
- et al.
- 2022
- ISCAS 2022
An Energy-Efficient High CSNR XNOR and Accumulation Scheme for BNN
- Dinesh Kushwaha
- Ashish Joshi
- et al.
- 2022
- IEEE TCAS-II