Design and phase noise analysis of a multiphase 6 to 11 GHz PLLGeorge Von BuerenDavid Barraset al.2009ESSCIRC 2009
A 5.75 to 44 Gb/s quarter rate CDR with data rate selection in 90 nm bulk CMOSLucio RodoniGeorge Von Bürenet al.2009IEEE Journal of Solid-State Circuits
5.75 to 44Gb/s quarter rate CDR with data rate selection in 90nm bulk CMOSGeorge Von BuerenLucio Rodoniet al.2008ESSCIRC 2008
Low power sampling latch for up to 25 Gb/s 2× oversampling CDR in 90-nm CMOSG. Von BürenL. Rodoniet al.2006ESSCIRC 2006