Wire-textured silicon solar cells

Wire array or nanowire based silicon solar cells based upon radial p-n junctions have been investigated over the past few years for enhanced light trapping, as well as for being able to offer radial junctions that are in close proximity to photogenerated carriers. To date, however, silicon wire array cells have not been able to demonstrate efficiencies higher than their planar controls. We have studied of wire textured solar cells using two approaches. The first experiment focuses on single crystal Si substrate. We use thin (2.3 μm) p- (∼5×1015 /cm3) epitaxial Si/p+(∼5×1019 /cm3) Si(100) substrates to fabricate wire arrays using a simple, top down process employing a self assembled mask of close packed polystyrene micro-spheres. The effective absorber depth is confined to the thin p- layer since the photocurrent generation in the p+ layer is negligible due to low minority carrier lifetimes. The thin layer accentuates the effect of the wire structures. Through a detailed study of wire diameter and conformality, we demonstrate wire array devices that outperform the planar controls in terms of efficiency and photocurrent. The second experiment focuses on multicrystalline Si. We show that the self assembled monolayer mask process can be adapted for wire texturing multicrystalline Si solar cells successfully in a low cost, scalable process using chemical functionalization as a result of which a simple dispensing technique can be used without the need for spinning or squeegee based approaches. We demonstrate cells with 20% higher short circuit current than the planar control, and show that the wire textured samples have a higher "pseudo"-efficiency when the series resistance effects are excluded. Finally, through an extensive examination of the electrical performance of the cells using both thin single crystal, as well as multi-crystalline bulk Si absorber layers, we have identified the key issues of light trapping, internal quantum efficiencies and series resistance as a function of wire diameter. © 2010 IEEE.