Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Transactional memory is a promising mechanism for syn- chronizing concurrent programs that eliminates locks at the expense of hardware complexity. Transactional memory is a hard feature to verify. First, transactions comprise several instructions that must be observed as a single global atomic operation. In addition, there are many reasons a transaction can fail. This results in a high level of non-determinism which must be tamed by the verication methodology. This paper describes the innovation that was applied to tools and methodology in pre-silicon simulation, acceleration and post-silicon in order to verify transactional memory in the IBM POWER8 processor core. Copyright 2014 ACM.
Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Johannes Koesters, Alex Goryachev
DAC 2014
Pradip Bose
VTS 1998
Raymond Wu, Jie Lu
ITA Conference 2007