Publication
RFIC 2014
Conference paper

Variable Delay Transmission Lines in advanced CMOS SOI technology

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Abstract

Variable (Delay) Transmission Lines (VTL) offer digital tuning of fabricated transmission lines to compensate for process variation in active and passive devices of RF silicon design enabling self-healing and post-production circuit tuning. A novel compact semi-analytic single ended VTL model, enabling accurate RFIC circuit level simulation to enhance design flow, was developed. VTL structures were fabricated and measured in IBM 32nm CMOS SOI technology. The 30,50,80 Ohm VTL structures, consisting of metal crossing lines between the signal line and ground plane that are connected to ground through CMOS switches, exhibit over 11%, 15%, 18% delay tuning range respectively with low insertion loss and good agreement between measured results and developed model simulations. © 2014 IEEE.

Date

Publication

RFIC 2014