Using machine learning clustering to find large coverage holes
Raviv Gal, Giora Simchoni, et al.
MLCAD 2020
We present results of performing analytics and visualizations over micro-architectural performance metrics collected in simulation of high-end processor designs. These results contribute to several use-cases: Obtain fast alerts in cases of anomalous behavior of the design, create a global view of performance-related coverage, and compare different versions of the hardware model as an aid to identification of root-causes of performance differences and correlations between metrics. We show case our methods and results through experiments on a very-high-end processor design, and discuss how they are expected to affect the methodology of performance verification of next-generation designs from the vendor.
Raviv Gal, Giora Simchoni, et al.
MLCAD 2020
Eldad Haber, Brian Irwin, et al.
ICML 2023
Raviv Gal, Haim Kermany, et al.
DAC 2020
Raviv Gal, Eldad Haber, et al.
Optimization and Engineering