System-level demonstration of a dynamically reconfigured burst-mode link using a nanosecond Si-photonic switch

Abstract

Using a novel FPGA-based network emulator, microsecond-scale packets with 12.5-20-Gb/s data are generated, routed through a nanosecond Si-photonic switch, and received in a fast-locking burst-mode receiver. Error-free links with <382-ns system-level switching are shown.