STT-MRAM - Status and Outlook

Abstract

We review the use-case and requirements for Spin-Transfer-Torque MRAM (STT-MRAM) to replace SRAM in last-level-cache. We then describe recent work on double magnetic tunnel junctions and double spin-torque magnetic tunnel junctions to reduce the MRAM switching current. The latter devices open up the possibility of reducing the switching current by a factor of two while maintaining high magnetoresistance, which could enable the use of STT-MRAM in last-level-cache.