Conference paper
Surface Energy Characterization for Die-Level Cu Hybrid Bonding
Katsuyuki Sakuma, Roy Yu, et al.
ECTC 2022
Strain effects from stress liners on silicon-on-insulator MOSFETs with high- k dielectric and metal gate (HKMG) are reported. By thoroughly evaluating their impact on drive current, mobility, and threshold voltage, the intrinsic performance gain of stress liners is quantified at the 32-nm node with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous stress liners can reduce gate leakage currents for MOSFETs with HKMG. © 2006 IEEE.
Katsuyuki Sakuma, Roy Yu, et al.
ECTC 2022
Huiling Shang, Sameer Jain, et al.
VLSI Technology 2012
Ruilong Xie, Chanro Park, et al.
VLSI Technology 2019
Jun Yuan, C. Gruensfelder, et al.
ICSICT 2010