Stas Polonsky, Paul Solomon, et al.
ISTFA 2009
A test structure suite to measure circuit delays, power, and operating margins of single flux quantum (SFQ) circuits and to derive key parameters directly from dc testable high-speed circuits is described. This suite comprises a set of ring oscillators and a time-differential experiment as well as isolated circuit components. Measured data are compared to the results obtained from circuit simulations conducted in a design environment used for more complex chip designs. This approach, which enables tracking of process technology and validation of device and circuit models in a self-consistent manner, is inspired by a similar methodology for silicon technology deployed successfully by IBM and its alliance partners.
Stas Polonsky, Paul Solomon, et al.
ISTFA 2009
Igor V. Vernik, Thomas A. Ohki, et al.
IEEE International SOI Conference 2010
Devin Underwood, Joseph A. Glick, et al.
PRX Quantum
Rajiv V. Joshi, J.O. Plouchart, et al.
CICC 2023