Reliable Sub-Nanosecond Switching in Magnetic Tunnel Junctions for MRAM Applications
Abstract
We demonstrate reliable sub-nanosecond switching in two-terminal spin transfer torque magnetoresistive random access memory (STT-MRAM) devices by using double spin-magnetic tunnel junctions (DS-MTJs). A write-error-rate (WER) of 1<italic>E</italic> <inline-formula> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula>6 was achieved in 194 devices with 250-ps write pulses and tight distributions. The WER <inline-formula> <tex-math notation="LaTeX">$=$</tex-math> </inline-formula> 1<italic>E</italic> <inline-formula> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula>6 was also demonstrated over a temperature range of <inline-formula> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula>40 <inline-formula> <tex-math notation="LaTeX">$^\circ$</tex-math> </inline-formula>C–85 <inline-formula> <tex-math notation="LaTeX">$^\circ$</tex-math> </inline-formula>C in a single device with 225-ps write pulses. No degradation was observed after 1<italic>E</italic>10 write cycles in selected single devices, written with 250-ps write pulses. We compare the DS-MTJ device switching performance with the published results from the state-of-the-art three-terminal spin–orbit torque (SOT) MRAM devices and show a 10<inline-formula> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> reduction in switching current density (<inline-formula> <tex-math notation="LaTeX">$\textit{J}_{\text{c}}$</tex-math> </inline-formula>) and 3–10<inline-formula> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> reduction in power consumption for devices with similar energy barriers (<inline-formula> <tex-math notation="LaTeX">$\textit{E}_{\text{b}}$</tex-math> </inline-formula>).