Realization of a silicon nanowire vertical surround-gate field-effect transistor

Abstract

A generic process for fabricating a vertical surround-gate field-effect transistor (VS-FET) based on epitaxially grown silicon nanowires was discussed. The silicon nanowires used were epitaxially grown by chemical vapor deposition (CVD) on a (111)-oriented p-type silicon substrate. It was found that the bending of the nanowire was probably due to stress during the spin-on-glass coating step and/or the polyimide curing. The results show that the array of VS-FET exhibited a gate-voltage-dependent current increase of more than two orders of magnitude.