Optimization of Projected Phase Change Memory for Application in Analog Neuromorphic Computing

Abstract

Phase change memory (PCM) is a promising candidate for non-von Neumann based analog in-memory computing – particularly for inference of previously-trained Deep Neural Networks [1,2], as well as Neuromorphic computing [3,4]. Many factors including resistance values, memory window, resistance drift, read noise, and programming accuracy impact the performance of PCM in analog neuromorphic computing applications. We previously showed that resistance drift and noise of a mushroom-type PCM device can be reduced by introducing an additional projection liner [5]. The projection liner comprised of a non-phase change material could decouple the read operation from the write operation and help mitigate the non-ideal attributes such as drift and noise. Here, we perform a systematic study of the electrical properties of these PCM devices—including resistance values, drift, noise, and endurance—and discuss the implications for in-memory computing. We optimize the PCM and projection liner materials to have effective drift mitigation while retaining a large enough memory window. We also examine how endurance cycling affects the phase change materials and the electrical characteristics of the devices. The results show that the liner is helping to maintain a rather constant reset resistance throughout the endurance cycles. With a widened memory window, no degradation in the drift mitigation through the cycling, and reduced read noise, these cycled PCM devices are shown to deliver excellent balance of performance for analog AI applications. Finally, the performance of these PCM devices for neural network inference is analyzed for state-of-the-art image processing and natural language processing tasks. [1] P. Narayanan, et al., Fully On-Chip MAC at 14nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format, Proc. VLSI Tech. Symposium, 2021 [2] R. Khaddam-Aljameh, et al., HERMES Core – A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing, Proc. VLSI Circuits Symposium, 2021 [3] I. Boybat, et al., Neuromorphic Computing with Multi-Memristive Synapses, Nature Communications 9, 2514, 2018 [4] G. W. Burr, et al., Neuromorphic computing using non-volatile memory, Advances in Physics: X, 2:1, 89, 2017 [5] R. Bruce, et al., Mushroom-type phase change memory with projection liner: an array-level demonstration of conductance drift and noise mitigation, Proc. IRPS, 2021