Optimal Design and Sequential Analysis of VLSI Testing Strategy

Abstract

In this paper, we present a new method for determining the optimal testing period and measuring the production yield. With the increased complexity of VLSI circuits, testing has become more costly and time consuming. The design of a testing strategy, which is specified by the testing period based on the coverage function of the testing algorithm, involves trading off of the cost of testing and the penalty of passing a bad chip as good. We first derive the optimal testing period assuming the production yield is known. Since the yield may not be known a priori, we next develop an optimal sequential testing strategy which estimates the yield based on ongoing testing results, which in turn determines the optimal testing period. Finally, we present the optimal sequential testing strategy for batches in which N chips are tested simultaneously. The results will be of use whether the yield stays constant or varies from one manufacturing run to another. © 1988 IEEE