MPEG/JPEG encoder architecture using hybrid technologies

Abstract

In this paper, we will discuss how we design high-performance hardware implementation architecture of the JPEG/MPEG encoders using hybrid technologies-analog optics and digital VLSI. A major costly computation of the JPEG/MPEG standard is the 2D discrete cosine transform. We design a powerful highly-parallel optical computing technique to perform the cosine transform and use VLSI for additional control-required functions. It can significantly save the cell count and improve the performance by combining the best features of optics and VLSI.