Inductance analysis of on-chip interconnects

Abstract

It is generally believed that inductance analysis of on-chip interconnect becomes important when the clock frequency of circuits rise above GHz level. In this paper we show that this perception is not true. It becomes necessary to consider the inductive effects in all circuits implemented in deep submicron CMOS technologies. For 0.25 μm (lithography) technologies, where the supply voltage is expected to be in the range of 1.2-1.8 V. inductive effects are an important consideration regardless of system frequency. Furthermore, contrary to the popular belief, we show that inductive effects are important even for highly resistive lines.