High-voltage and high-power PLL diagnostics using advanced cooling and emission images

Abstract

In this paper, we discuss a diagnostics methodology based on the combined use of advanced chip cooling technology and high-resolution time-integrated images of the Light Emission due to Off-State Leakage Current (LEOSLC). The methodology was successfully applied to the debug of an IBM microprocessor chip fabricated in the 90 nm SOI technology generation. © 2006 IEEE.