Timoleon Moraitis, Abu Sebastian, et al.
IJCNN 2017
We present a reverse concatenation (RC) architecture using Reed-Solomon (RS) error-correction codes (ECCs). The scheme employs very-high-rate pre-RS modulation codes followed by RS parity symbol insertion. The very-high-rate modulation codes in the RC scheme, which facilitate timing recovery and automatic gain control and reduce the detector path memory, are of the same type as the modulation codes that have been used in generalized partial-response maximum-likelihood (PRML) detection systems. © 2007 IEEE.
Timoleon Moraitis, Abu Sebastian, et al.
IJCNN 2017
Manuel Le Gallo, Riduan Khaddam-Aljameh, et al.
Nature Electronics
Gael F. Close, Urs Frey, et al.
VLSI Circuits 2011
Hlynur Jónsson, Giovanni Cherubini, et al.
Entropy