Raul Camposano, L.F. Saunders, et al.
IEEE Design and Test of Computers
In this tutorial, the author describes how high-level synthesis bridges the gap between behavioral specifications and hardware structure by automatically generating a circuit description from a netlist. The resulting description can be used for other design automation tools such as logic synthesis and layout. Describing high-level synthesis for synchronous digital hardware, the author explains the steps of the process, which include compilation, transformation, scheduling, and allocation. © 1990 IEEE
Raul Camposano, L.F. Saunders, et al.
IEEE Design and Test of Computers
Raul Camposano
HICSS 1990
Raul Camposano, Louise Trevillyan
ISCAS 1989
Raul Camposano, Reinaldo A. Bergamaschi
DAC 1990