Conference paper
Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
CNFETs were fabricated in a top gate construction. The thin dielectric offered improved electrical performance relative to substrate-gated CNFETs with thicker gate dielectrics, at a fraction of the gate voltage. The top gate structure also offered individual switchability, as well as stable n-FET and p-FET devices, enabling the possibility of future CMOS CNFET circuits.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Ranulfo Allen, John Baglin, et al.
J. Photopolym. Sci. Tech.
R. Ghez, M.B. Small
JES
J.C. Marinace
JES