Evaluation of Cu CMP barrier slurries for Ultra Low-k dielectric film (k~2.4) for 45nm technology

Abstract

Various barrier slurryies for Cu CMP process are evaluated for integratoin of porous ULK (Ultra Low-k, k~2.4) for 45nm technology. The fat-wire dual damascene levels were built with Cu metallization and ULK inter level dielectric. Barrier polishing process removes the remaining etch Hard-Mask and polishes directly into ULK, targeting ~300A removal of ULK film. The study shows that barrier slurries affect the topography, defectivity and within-wafer uniformity. k-value shift measurements on blanket wafers showed that acidic slurry has minimal k-value shift compared to alkaline slurries. However, the k value can be restored with post CMP annealing. k value extracted from integrated wafers using alkaline slurry showed no change due to CMP.