H. Y. Chang, Geoffrey W. Burr, et al.
IBM J. Res. Dev
We report a systematic study of the feasibility of using directed self-Assembly (DSA) in real product design for 7-nm fin field effect transistor (FinFET) technology. We illustrate a design technology co-optimization (DTCO) methodology and two test cases applying both line/space type and via/cut type DSA processes. We cover the parts of DSA process flow and critical design constructs as well as a full chip capable computational lithography framework for DSA. By co-optimizing all process flow and product design constructs in a holistic way using a computational DTCO flow, we point out the feasibility of manufacturing using DSA in an advanced FinFET technology node and highlight the issues in the whole DSA ecosystem before we insert DSA into manufacturing.
H. Y. Chang, Geoffrey W. Burr, et al.
IBM J. Res. Dev
Charles Mackin, Pritish Narayanan, et al.
CLEO/Europe-EQEC 2019
Wanki Kim, Robert L. Bruce, et al.
VLSI Technology 2019
Moutaz Fakhry, Yuri Granik, et al.
SPIE Photomask Technology + EUV Lithography 2011