Masami Akamine, Jitendra Ajmera
IEICE Trans Inf Syst
Queue processors are a viable alternative for high performance embedded computing and parallel processing. We present the design and implementation of a compiler for a queue-based processor. Instructions of a queue processor implicitly reference their operands making the programs free of false dependencies. Compiling for a queue machine differs from traditional compilation methods for register machines. The queue compiler is responsible for scheduling the program in level-order manner to expose natural parallelism and calculating instructions relative offset values to access their operands. This paper describes the phases and data structures used in the queue compiler to compile C programs into assembly code for the QueueCore, an embedded queue processor. Experimental results demonstrate that our compiler produces good code in terms of parallelism and code size when compared to code produced by a traditional compiler for a RISC processor. © 2008 Elsevier B.V. All rights reserved.
Masami Akamine, Jitendra Ajmera
IEICE Trans Inf Syst
Susan L. Spraragen
International Conference on Design and Emotion 2010
Khalid Abdulla, Andrew Wirth, et al.
ICIAfS 2014
Fahiem Bacchus, Joseph Y. Halpern, et al.
IJCAI 1995