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IEEE TAS
Paper

Data-driven self-timed RSFQ high-speed test system

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Abstract

Functional testing of rapid single-flux-quantum (RSFQ) logic circuits at high speed is necessary to further optimize circuit design, but it is not easy to do off-chip testing because of the high speed and small amplitude of SFQ pulses. This paper will present the design and test results of an 20 Gb/s bit-by-bit on-chip high-speed digital test system based on data-driven self-timed (DDST) circuits. © 1997 IEEE.

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IEEE TAS