Publication
IITC 2013
Conference paper

CVD-Co/Cu(Mn) integration and reliability for 10 nm node

View publication

Abstract

In studying integrated dual damascene hardware at 10 nm node dimensions, we identified the mechanism for Co liner enhancement of Cu gap-fill to be a wetting improvement of the PVD Cu seed, rather than a local nucleation enhancement for Cu plating. We then show that Co "divot" (top-comer slit void defect) formation can be suppressed by a new wet chemistry, in turn eliminating divot-induced EM degradation. Further, we confirm a relative decrease in Cu-alloy seed proportional resistivity impact compared to scattering at scaled dimensions, and finally we address the incompatibility between the commonly-used carbonyl-based CVD-Co process with Cu-alloy seed EM performance This problem is due to oxidation of Ta(N) barriers at the TaN/CVD-Co interface by carbonyl-based CVD processes, which then consumes alloy atoms before they can segregate at the Cu/cap interface. We show that O-free CVD-Co may solve this problem. The above solutions may then enable CVD-Co/Cu-alloy seed integration in advanced nodes. © 2013 IEEE.