Comparison of high speed voltage-scaled conventional and adiabatic circuits

The power versus frequency performance of a micro-pipelined conventional CMOS logic family is compared with that of three similarly pipelined energy-recovering logic families. Using a circuit simulator, the supplies and operating voltages of each family are optimized for minimum power consumption at each frequency. One of the energy-recovering logic families is shown to be capable of substantially lower dissipation than the conventional case, one is comparable, and one is worse.