Compact modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETs

Abstract

Compact physical models for SSOI MOSFETs are presented. The models consider specific features for strained-Si devices including SSOI such as mobility enhancement, band offsets, junction capacitance, and self-heating effects. All of the floating-body current components in conventional SOI structure, which are generation/recombination current, reverse-bias (band-to-band and trap-assisted) junction tunneling currents, gate-induced drain leakage current, gatebody oxide tunneling current, and impact ionization current are applied to the SSOI device, and their effects are discussed. The model validity is confirmed by fabricated 70 nm bulk-Si (control) and strained-Si devices.