Pradip Bose, Alper Buyuktosunoglu, et al.
GLSVLSI 2010
Integrating large DRAM caches is a promising way to address the memory bandwidth wall issue in the many-core era. However, organizing and implementing a large DRAM cache imposes a trade-off between tag space overhead and memory bandwidth consumption. CHOP (Caching Hot Pages) addresses this trade-off through three filter-based DRAM-caching techniques. © 2011 IEEE.
Pradip Bose, Alper Buyuktosunoglu, et al.
GLSVLSI 2010
Niti Madan, Alper Buyuktosunoglu, et al.
HPCA 2011