Conference paper
Performance test case generation for microprocessors
Pradip Bose
VTS 1998
An algebra for multiple valued logic systems is presented in this paper. This algebra uses r-1 new concurrent operators along with the traditional supremum and cycle operators. It is also shown that r+1 operators are required to generate any r-valued logic function. Five new theorems, similar to DeMorgan's Laws, are then used to show that only one fundamental mapping is sufficient to represent any multi-valued logic function.
Pradip Bose
VTS 1998
David A. Selby
IBM J. Res. Dev
M.J. Slattery, Joan L. Mitchell
IBM J. Res. Dev
Gal Badishi, Idit Keidar, et al.
IEEE TDSC