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Journal of Parallel and Distributed Computing
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A Unified Framework for Instruction Scheduling and Mapping for Function Units with Structural Hazards

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Abstract

Software pipelining methods based on an ILP (integer linear programming) framework have been successfully applied to derive rate-optimal schedules under resource constraints. However, like many other previous works on software pipelining, ILP-based work has focused on resource constraints of simple function units, e.g., "clean pipelines" - pipelines without structural hazards. The problem for architectures beyond such clean pipelines remains open. One challenge is how to represent such resource constraints for unclean pipelines, i.e., pipelined function units, but having structural hazards. In this paper, we propose a method to constructrate-optimalsoftware pipelined schedules for pipelined architectures with structural hazards. A distinct feature of this work is that it provides a unified ILP framework for two challenging and interrelated aspects of software pipelining - the scheduling of instructions at particular times and the mapping of those instructions to specific function units. Solving both of these aspects is essential to finding schedules which will work both on VLIW machines which map instructions to fixed function units and on dynamic out-of-order superscalars. We propose two ILP formulations to solve the integrated scheduling and mapping problem. Both adopt principles of graph coloring in an ILP framework, and one usesforbidden latenciesin an elegant extension of classical hardware pipeline control theory. We have run experiments on four variations of our proposed formulations. As input we used a set of 415 "unique" loops taken from several benchmark suites, and we targeted an architecture whose function units contain many structural hazards. All four of our variations did well, with the best finding a rate-optimal schedule for 65% of the loops. This compares favorably with a leading heuristic, Huff'sSlack Scheduling - the ILP approaches found a schedule with smaller initiation interval for over 50% of the loops, with a mean improvement of almost 30%. Finally, we have found that reusing pipeline stages - and thus adding hazards - results in only a 10% drop in performance, while permitting significant savings in area. © 1998 Academic Press.

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Journal of Parallel and Distributed Computing

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