A Microprocessor-Based Office Image Processing System

This paper presents a multiprocessor system architecture and the scheduling policies of the processors which can off-load a host computer in the image processing of office documents. The objective of this system is to provide extensive image processing capabilities at minimum cost and with an acceptable interactive response time. Multiprocessor system architecture, image partitioning strategies, image processing algorithm characteristics, performance modeling, and processor scheduling policies are investigated. A prototype multiprocessor image processing system has been built at the IBM San Jose Research Laboratory. Copyright © 1982 by The Institute of Eletrical and Electronis Engineers, Inc.